SMP and Processor Revision

This is a discussion about SMP and Processor Revision in the Windows Hardware category; i am running dual p2 400s, i get a strange message in my event viewer that says that there is some sort of performance thing about using two different revisions. like as if i was trying to run two cpus at different speeds.

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i am running dual p2 400s, i get a strange message in my event viewer that says that there is some sort of performance thing about using two different revisions. like as if i was trying to run two cpus at different speeds. also, for some reason smp with quake3 still does not work? it should now, whats the deal, is that revision thing my problem?
 
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Feb 11
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Feb 11
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If your CPUs are more that one stepping apart, then they're likely not to work correctly under SMP...
 
Intel has a page devoted to the CPU revisions that are "supported" for SMP use, but they're basically no more than one stepping apart...
 
 
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SuperMicro P6DBS (dual UW-SCSI) BIOS 2.2, 2*Celery 300a @ 450Mhz, 384MB PC100 RAM
SCSI-A=4.3Gb+9Gb, SCSI-B=Tosh32x CD-ROM, Yamaha4416 CD-RW, Iomega ZIP100, IDE1=4.3Gb
IBM EtherJet 10/100 NIC PCI + Nortel ADSL "modem"
CL TNT1 AGP + Quantum3D Voodoo2 SLI PCI
SoundBlaster Live PCI (not Value)
Win2K build 2195 Retail (no 120-day eval)