Both currently available versions of Rambus and DDR have basic clock rate per bit transfer limitations (i.e. 800 Mb/s per data pin RDRAM, 333 Mb/s per pin DDR). There is an architectural limitation for DDR which was addressed by Rambus by using controlled impedance and a serial connection for modules, whereas DDR is an extension of SDRAM where you have a parallel bus structure with modules acting as un-terminated 'open stubs' on the bus (potentially resulting in signal integrity problems at high speed, such as signal reflections).